☠️
EXFILTRATING
DATA...
01010111 10110010 00101001 11000110 01101100 10011011 00010001 11100101 01000010 10101111
[ <-- BACK_TO_SEARCH ]

CVE-2024-31852

CVE-2024-31852 Supply Chain Attack in Llvm
📅 PUBLISHED: 2024-04-05 00:00 UTC 🔄 UPDATED: 2026-09-23 20:28 UTC
[ OFFICIAL PATCH DEPLOYED ↓ ] FIX: LIKELY — 2 independent sources confirm fix
[ DEFENSE PATCH ↓ ]
💣 PoC: None
👁️
Proof of Concept - Indicates if functional exploit code is publicly available, drastically increasing the risk of immediate attacks.
🎯 EPSS: 0.99%
👁️
0.99% probability
24.8× above the median CVE
Tier: ELEVATED
30-day exploitation window · FIRST.org · updated daily
Patch available — upgrade to latest release
CVSS SEVERITY SCALE
9.0–10.0 CRITICAL
7.0–8.9 HIGH
4.0–6.9 MEDIUM
0.1–3.9 LOW
0.0 NONE
5.9
THREAT LEVEL
■ tracking this CVE ✓ independent patch confirmation ⧗ same-origin mirror (GHSA) ⚠ active exploitation verification policy →

Executive Summary

CVE-2024-31852 is a vulnerability in the LLVM compiler suite, specifically affecting the ARM backend. The flaw allows the Link Register (LR) to be overwritten without saving its value to the stack, potentially leading to a control-flow hijacking gadget (JOP). While the vendor assesses the exploitability as very low due to the miscompile typically causing crashes on valid inputs, the issue remains a latent risk in compiled ARM binaries. No public proof-of-concept or exploit code is available, and the CVSS score is currently unassigned (0.0). The vulnerability is patched in LLVM version 18.1.3.

⚡ AUTOMATE YOUR CVE INTELLIGENCE

This record — and 170,000+ others — are available via the ValtersIT API. One endpoint replaces five: NVD + GitHub CVE + CISA KEV + EPSS + Nuclei + Exploit-DB, unified.

›Patch confidence — UNVERIFIED to CONFIRMED, cross-referenced NVD + RHSA + Debian
›Exploit & PoC — poc_status, poc_url, has_exploit. Not in NVD.
›Shodan dorks — ready-made queries to find exposed vulnerable systems
›Detection rules — YARA · Wazuh · Elastic (all plans) · Sigma (Pro)
›pending_fields — know exactly which of 7 fields NVD hasn't processed yet
›Free backfill — data incomplete when you paid? Re-check within 30 days = 0 credits
PAYG €0.08/lookup Standard €19/mo (was €29) · 5k credits Pro €65/mo (was €99) · 20k credits FOUNDING PRICE · LOCKED FOR LIFE · ENDS 31 DEC 2026
[ FROM €19/MO ]
Free sandbox key available
No signup required

Supply Chain & Package Security

This vulnerability is not in a package manager ecosystem (NPM, PyPI, Go, Ruby) but in the LLVM compiler toolchain itself. However, any software compiled with an affected LLVM version for ARM targets could inherit this miscompilation. This introduces a supply chain risk where downstream binaries may contain exploitable gadgets, even if the source code is secure.

CVSS Breakdown & Threat Level

  • CVSS Score: 0.0 (Unassigned)
  • Attack Vector (AV): Not Applicable (N/A) – The vulnerability is in the compiler output, not a network-accessible service.
  • Attack Complexity (AC): High – Exploitation requires specific conditions and a crafted input to trigger the miscompilation.
  • Privileges Required (PR): None – The vulnerability is in the compiled binary, not requiring authentication.
  • User Interaction (UI): Required – A user must execute the vulnerable binary with a specific input.
  • Scope (S): Unchanged – The exploit affects the process itself.
  • Confidentiality (C): Low – Potential for information disclosure via control-flow hijacking.
  • Integrity (I): Low – Potential for code execution.
  • Availability (A): Low – The miscompile often causes crashes.

Threat Level: Low (due to low exploitability and no public PoC).

Deep Dive & Mechanics

The vulnerability resides in LLVM's ARM backend code generation. The ARM architecture uses the Link Register (LR, R14) to store the return address for function calls. Normally, when a function is called, the compiler saves the LR to the stack (push {lr}) and restores it before returning (pop {pc}).

In affected versions of LLVM (before 18.1.3), the compiler may generate code that overwrites the LR register without first saving it to the stack. This can happen during function epilogues or when the compiler incorrectly optimizes register allocation. The result is that when the function returns, the program counter (PC) is loaded from a corrupted LR, leading to a jump to an attacker-controlled address (a JOP gadget).

The vendor notes that this miscompile is rare and typically causes a crash on most valid inputs. However, if an attacker can control the input that triggers the miscompile, they might be able to redirect execution to a useful gadget chain.

Vulnerable vs. Patched Code

Vulnerable (LLVM < 18.1.3):

; Example of vulnerable ARM assembly
function:
    push {r4, r5, lr}   ; Save LR to stack
    ...                  ; Function body
    ; Miscompile: LR is overwritten here without saving
    mov lr, r0          ; Overwrites LR with attacker-controlled value
    pop {r4, r5, pc}    ; Returns to corrupted LR

Patched (LLVM 18.1.3+):

; Example of patched ARM assembly
function:
    push {r4, r5, lr}   ; Save LR to stack
    ...                  ; Function body
    ; Correct behavior: LR is saved before modification
    str lr, [sp, #-4]!  ; Save LR to stack
    mov lr, r0          ; Now safe to overwrite LR
    ldr pc, [sp], #4    ; Restore LR and return

The patch ensures that any modification to the LR register is preceded by a save to the stack, preventing the control-flow hijack.

Exploitation & Lab Setup

Red Team

Prerequisites:

  • An ARM binary compiled with LLVM < 18.1.3.
  • Ability to provide input that triggers the miscompile.

Exploitation Steps:

  1. Identify a function in the binary that uses the LR register without saving it.
  2. Craft an input that causes the function to reach the vulnerable code path.
  3. Control the value that overwrites LR (e.g., via a buffer overflow or controlled argument).
  4. When the function returns, execution jumps to the attacker-controlled address.

Example (Conceptual):

# Compile a vulnerable binary
clang-18.1.2 -target arm-linux-gnueabihf -o vulnerable.elf vulnerable.c

# Run with crafted input
./vulnerable.elf $(python3 -c "print('A'*100)")

Note: No public exploit code exists. This is a theoretical exploitation path.

Blue Team

Detection:

  • Monitor for crashes in ARM binaries that involve the LR register.
  • Use static analysis to scan compiled binaries for missing LR saves.
  • Implement runtime checks (e.g., stack canaries) to detect control-flow hijacking.

Mitigation:

  • Recompile all ARM binaries with LLVM 18.1.3 or later.
  • Apply compiler flags like -fstack-protector-strong to add additional protection.
  • Use Control Flow Integrity (CFI) mechanisms if available.

Indicators of Compromise (IOCs)

  • File Hashes: None available (no known malicious samples).
  • Network Signatures: None (vulnerability is in compiled code, not network traffic).
  • Behavioral: Unexplained crashes in ARM binaries, especially those involving return address corruption.
  • Registry/File System: Presence of binaries compiled with LLVM < 18.1.3 for ARM.

Detection Engineering

YARA Rule

rule CVE_2024_31852_ARM_LR_Overwrite {
    meta:
        description = "Detects ARM binaries compiled with LLVM < 18.1.3 that may have LR overwrite vulnerability"
        author = "Valters IT"
        date = "2025-04-10"
        cve = "CVE-2024-31852"
    strings:
        $arm_code = { E5 9D F0 04 }  // Example: LDR PC, [SP, #4] (pop {pc}) without LR save
        $arm_code2 = { E1 A0 F0 0E } // Example: MOV PC, LR (return without LR save)
    condition:
        $arm_code or $arm_code2
}

Sigma Rule

title: CVE-2024-31852 - ARM LR Overwrite Detection
id: 7a8b9c0d-1e2f-3a4b-5c6d-7e8f9a0b1c2d
status: experimental
description: Detects crashes or anomalies in ARM binaries that may indicate exploitation of CVE-2024-31852
author: Valters IT
date: 2025-04-10
logsource:
    category: process_creation
    product: linux
detection:
    selection:
        Image|endswith: '.elf'
        CommandLine|contains: 'segfault'
    condition: selection
falsepositives:
    - Legitimate crashes in ARM binaries
level: low

Suricata Rule

alert tcp any any -> any any (msg:"CVE-2024-31852 - Potential ARM LR Overwrite Exploit"; flow:to_server; content:"|E5 9D F0 04|"; sid:1000001; rev:1;)

Remediation & Mitigation

  1. Immediate: Upgrade LLVM to version 18.1.3 or later.
  2. Short-term: Recompile all ARM binaries with the patched compiler.
  3. Long-term: Implement static analysis in CI/CD pipelines to detect missing LR saves in ARM assembly.
  4. Compensating Controls: Use stack canaries, ASLR, and NX to mitigate exploitation.

Valters IT Senior DevSecOps & Cyber Threat Intelligence Expert

◈ SOURCE Analysis & enrichment: valtersit.com/cve/CVE-2024-31852/ · CVE data: NVD/MITRE (public domain) · © 2026 ValtersIT Hub
>_ SYSTEM_CORE: INTEL_ACTIVE
90% TEAM-CURATED // 10% AUTOMATED INGESTION.
ALL PATCH REFERENCES AND VERSION DATA SOURCED FROM NVD + OSV OFFICIAL REGISTRIES.