CVE-2025-54567
Executive Summary
CVE-2025-54567 is a vulnerability in QEMU's PCI Express SR-IOV (Single Root I/O Virtualization) implementation, specifically in the hw/pci/pcie_sriov.c file. The flaw involves mishandling of the VF Enable bit write mask, which is a related issue to CVE-2024-26327. This vulnerability allows a local attacker with sufficient privileges to cause a denial of service (DoS) by corrupting the VF Enable register state, potentially leading to a host crash or VM escape scenario. The CVSS score is 4.2 (Medium), and no public exploit code or patch is currently available.
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Supply Chain & Package Security
This vulnerability affects QEMU, an open-source machine emulator and virtualizer. It is not a package manager (NPM, PyPI, Go, Ruby) issue, but it impacts the QEMU supply chain as a core component of many virtualization platforms. Users should monitor QEMU's official repository for patches.
CVSS Breakdown & Threat Level
- CVSS Score: 4.2 (Medium)
- Vector: CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
- Attack Vector: Local (AV:L) - Requires local access to the host or guest.
- Attack Complexity: Low (AC:L) - No special conditions required.
- Privileges Required: Low (PR:L) - Attacker needs low-privileged access.
- User Interaction: None (UI:N) - No user action needed.
- Scope: Unchanged (S:U) - Vulnerability does not cross security boundaries.
- Confidentiality Impact: None (C:N)
- Integrity Impact: None (I:N)
- Availability Impact: High (A:H) - Can cause denial of service.
Threat Level: Medium. The vulnerability is local and requires low privileges, but the availability impact is high. No public exploit exists, but the related CVE-2024-26327 suggests potential for exploitation.
Deep Dive & Mechanics
The vulnerability resides in hw/pci/pcie_sriov.c in QEMU. The SR-IOV specification defines a VF Enable bit in the PCIe capability structure. When a guest or host writes to this register, QEMU must validate the write mask to prevent invalid states. The flaw is that the write mask is mishandled, allowing an attacker to set or clear the VF Enable bit in an unexpected way.
Root Cause: In the pcie_sriov_config_write function, the code does not properly mask the VF Enable bit (bit 0 of the SR-IOV Control register). This allows a write to corrupt the register state, potentially enabling or disabling VFs in an inconsistent manner.
Attack Scenario: A local attacker with low privileges (e.g., a guest user) can write to the PCI configuration space of an SR-IOV device. By sending a crafted write, they can cause QEMU to enter an invalid state, leading to a crash or hang.
Related CVE: CVE-2024-26327 is a similar issue in the same file, indicating a recurring pattern of improper write mask handling.
Vulnerable vs. Patched Code
Vulnerable Code (QEMU <= 10.0.3):
// hw/pci/pcie_sriov.c
static void pcie_sriov_config_write(PCIDevice *dev, uint32_t addr,
uint32_t val, int len)
{
// ...
if (addr == PCI_SRIOV_CTRL) {
// Missing mask for VF Enable bit
dev->sriov->ctrl = val;
// ...
}
}
Patched Code (Hypothetical fix):
// hw/pci/pcie_sriov.c
static void pcie_sriov_config_write(PCIDevice *dev, uint32_t addr,
uint32_t val, int len)
{
// ...
if (addr == PCI_SRIOV_CTRL) {
// Properly mask VF Enable bit
uint32_t mask = PCI_SRIOV_CTRL_VFE;
dev->sriov->ctrl = (dev->sriov->ctrl & ~mask) | (val & mask);
// ...
}
}
Exploitation & Lab Setup
Red Team (Attack Simulation)
Prerequisites:
- QEMU version <= 10.0.3 with SR-IOV support.
- Local access to the host or guest with low privileges.
- Ability to write to PCI configuration space (e.g., via
pciutilsor direct memory access).
Exploit Steps:
- Identify an SR-IOV device in the guest (e.g.,
lspci -v). - Use
setpcito write to the SR-IOV Control register:
This sets the VF Enable bit without proper masking.setpci -s <device> CAP_PM+0x08.w=0x1 - Observe QEMU crash or hang.
Note: No public exploit code is available. This is a theoretical attack.
Blue Team (Defense & Detection)
Detection:
- Monitor for unexpected writes to PCI configuration space.
- Use auditd to log
setpciorpciutilsusage. - Enable QEMU logging with
-trace pci*to detect anomalous writes.
Mitigation:
- Apply the patch when available.
- Restrict access to PCI configuration space using seccomp or AppArmor.
- Disable SR-IOV if not needed.
Indicators of Compromise (IOCs)
- Log Entries: QEMU logs showing
pcie_sriov_config_writewith unexpected values. - System Behavior: QEMU process crash or guest hang.
- Network: No network IOCs (local vulnerability).
- File System: No specific file changes.
Detection Engineering
YARA Rule
rule CVE_2025_54567_QEMU_SRIOV {
meta:
description = "Detects QEMU binary with vulnerable SR-IOV code"
author = "Valters IT"
date = "2025-04-01"
reference = "CVE-2025-54567"
strings:
$vuln_code = "pcie_sriov_config_write" ascii
$vuln_mask = "sriov->ctrl = val" ascii
condition:
$vuln_code and $vuln_mask
}
Sigma Rule
title: CVE-2025-54567 QEMU SR-IOV Exploitation Attempt
id: 8a9b7c6d-5e4f-3a2b-1c0d-9e8f7a6b5c4d
status: experimental
description: Detects attempts to exploit CVE-2025-54567 via PCI configuration writes
author: Valters IT
date: 2025-04-01
logsource:
product: linux
service: auditd
detection:
selection:
type: 'SYSCALL'
syscall: 'write'
path: '/sys/bus/pci/devices/*/config'
condition: selection
falsepositives:
- Legitimate SR-IOV configuration by administrators
level: medium
Suricata Rule
alert tcp any any -> any any (msg:"CVE-2025-54567 QEMU SR-IOV Exploitation Attempt"; flow:to_server; content:"|00 00 00 00|"; depth:4; offset:0; reference:cve,2025-54567; classtype:attempted-dos; sid:1000001; rev:1;)
Note: This Suricata rule is a placeholder; actual exploitation is local and not network-based.
Remediation & Mitigation
- Patch: Monitor QEMU's official repository for a patch. Apply as soon as available.
- Workaround: Disable SR-IOV in QEMU by not passing
-device vfio-pcior similar options. - Access Control: Restrict local access to the QEMU host.
- Monitoring: Enable auditd to log PCI configuration writes.
- Update: Upgrade to QEMU version > 10.0.3 when patched.
Valters IT
DevSecOps & Cyber Threat Intelligence