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CVSS: 8.1 CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:L/I:H/A:H 🐛 CWE-121
👁️
Common Weakness Enumeration - Identifies the specific category of software weakness or flaw.

CVE-2026-13465

CVE-2026-13465 Stack Buffer Overflow in Altera
📅 PUBLISHED: 2026-09-24 00:00 UTC 🔄 UPDATED: 2026-09-25 05:00 UTC
[ ZERO-DAY / UNPATCHED ] [ DEFENSE PATCH ↓ ]
💣 PoC: None
👁️
Proof of Concept - Indicates if functional exploit code is publicly available, drastically increasing the risk of immediate attacks.
🥷 MITRE: T1068
👁️
MITRE ATT&CK Tactic - Describes the strategy hackers use to execute this attack.
VULNERABLE: Trusted Firmware through socfpga_v2.14.0
CVSS VECTOR BREAKDOWN 8.1
AV: L Attack Vector Local
AC: L Attack Complexity Low
PR: H Privileges Required High
UI: N User Interaction None
S: C Scope Changed
C: L Confidentiality Low
I: H Integrity High
A: H Availability High
8.1
THREAT LEVEL
■ tracking this CVE ✓ independent patch confirmation ⧗ same-origin mirror (GHSA) ⚠ active exploitation verification policy →

Executive Summary

CVE-2026-13465 is a stack-based buffer overflow (CWE-121) in Altera Trusted Firmware running on the Hard Processor System (HPS) of SoC FPGA devices, affecting all versions through socfpga_v2.14.0. The flaw stems from improperly configured or implemented memory protections, allowing a local attacker with high privileges to corrupt stack memory and potentially execute arbitrary code within the trusted execution context. With a CVSS score of 8.1, successful exploitation grants high integrity and availability impact with scope change, enabling attackers to escape the intended security boundary of the trusted firmware.

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Technical Analysis

The vulnerability is classified as a stack-based buffer overflow (CWE-121) occurring within Altera's Trusted Firmware implementation for the HPS subsystem on SoC FPGA platforms. Trusted Firmware is a reference implementation of secure world software for Arm processors, typically executing at the highest privilege level (Secure Monitor / EL3 or equivalent). It provides secure boot, runtime services, and acts as the root of trust for the platform.

The core issue, as described by NVD, is twofold: an improperly configured or implemented memory protection scheme combined with a stack-based buffer overflow condition. This means that memory protection mechanisms — such as stack canaries, non-executable stack (NX/XN) enforcement, or memory region isolation — are either absent, incorrectly configured, or ineffective in this specific code path. As a result, an overflow condition on the stack is not reliably detected or prevented, allowing an attacker to overwrite adjacent stack memory including potentially saved return addresses, local variables of security relevance, or function pointers.

The CVSS vector (AV:L/AC:L/PR:H/UI:N/S:C/C:L/I:H/A:H) reveals several critical characteristics:

  • AV:L (Local): The attack must be launched from a local context. This typically implies an attacker already present on the device with the ability to interface with the Trusted Firmware, likely via a compromised rich-execution-environment (REE) component, a malicious driver, or physical access to debug interfaces.
  • AC:L (Low Complexity): No special conditions or race windows are required; the overflow can be triggered reliably.
  • PR:H (High Privileges Required): The attacker must already hold elevated privileges on the system — for example, kernel-level access on the Application Processor, or access to a secure-world interface that accepts input.
  • UI:N (No User Interaction): No user action is required once the attacker has the prerequisite access.
  • S:C (Scope Changed): This is significant — exploitation crosses a security boundary. The vulnerable component (Trusted Firmware) and the impacted component are in different security scopes. The attacker's actions in a lower-privilege context can affect a higher-privilege component, meaning a compromise of Trusted Firmware can impact the entire platform's security guarantees.
  • C:L (Confidentiality Low): Limited confidentiality impact, suggesting the overflow may not directly leak large amounts of sensitive data, or that data exposure is constrained.
  • I:H (Integrity High): The attacker can modify critical data, potentially altering Trusted Firmware behavior, modifying security policies, or corrupting the trusted computing base.
  • A:H (Availability High): Successful exploitation can crash or render the device/trusted execution environment unusable.

The phrase "Exploitation of Improperly Configured or Implemented Memory Protections" in the NVD description suggests that the vulnerability may be exacerbated by missing or misconfigured mitigations such as stack canaries, guard pages, or read-only relocations within the Trusted Firmware binary. It is not possible, based on the available description, to identify specific functions, input interfaces, or code paths without further vulnerability disclosure or reverse engineering.

Because Trusted Firmware on HPS sits beneath the operating system and manages the secure boot chain, any code execution within it undermines all higher layers of trust. The attacker effectively operates with the highest privilege on the SoC, bypassing OS-level security controls entirely. This places CVE-2026-13465 in a severe category despite the local attack vector, as compromise of the trusted firmware can persist across reboots (if boot chain integrity is altered) and is extremely difficult to detect from within the operating system.

No public proof-of-concept, exploit code, or Nuclei template exists as of this assessment. No OSV package data or affected version listing is available beyond the stated firmware version range.

Exploitation Scenarios

No public proof-of-concept or exploit code is available for CVE-2026-13465. The following attack chain is inferred from the vulnerability class (stack-based buffer overflow with improper memory protections in Trusted Firmware on HPS) and the CVSS vector. Specific function names, API paths, or interface identifiers are not disclosed in the NVD description and are therefore not fabricated here.

1) Reconnaissance / Target Identification An attacker first identifies a target device running Altera SoC FPGA hardware with Trusted Firmware version socfpga_v2.14.0 or earlier. This could be accomplished through device fingerprinting, firmware version queries (where exposed), or physical inspection of hardware in industrial, automotive, networking, or aerospace deployments. The attacker must determine that the HPS is running a vulnerable Trusted Firmware build. Devices with accessible debug interfaces (e.g., JTAG), compromised operating systems, or exposed secure-world services are primary candidates.

2) Triggering the Vulnerability The attacker must already possess high privileges locally (PR:H) — for example, kernel-level access on the Application Processor, or the ability to send crafted requests to a secure-world service that processes input destined for Trusted Firmware. The stack-based buffer overflow is triggered by supplying input that exceeds the bounds of a stack-allocated buffer within a Trusted Firmware code path. Because memory protections are improperly configured or implemented, the overflow is not blocked by stack canaries, and the attacker's data overwrites adjacent stack memory. The exact input interface (SMC call, mailbox message, shared memory region, or other IPC mechanism) is not disclosed, but the vulnerability class implies that a trusted input path accepts variable-length data withoutadequate bounds checking.

3) Payload / Execution Once the overflow is triggered, the attacker overwrites stack-resident control data — potentially a saved return address or function pointer. Due to the ineffective memory protections, the attacker can redirect execution flow within the Trusted Firmware's privileged context. The payload would be positioned either within the overflowed buffer itself (if stack execution is possible due to misconfigured NX) or in another attacker-controlled memory region referenced by a corrupted pointer. The CVSS integrity/availability scores (I:H/A:H) and scope change (S:C) indicate that the attacker can alter trusted firmware behavior and cross the security boundary between normal world and secure world.

4) Post-Exploitation Impact Successful exploitation grants the attacker code execution at the highest privilege level of the SoC. Potential consequences include: disabling or altering secure boot verification, extracting or replacing cryptographic keys stored in the trusted environment, modifying security policies, persistent backdoor installation in firmware (surviving OS reinstallation and potentially reboots), and denial of service by crashing the secure world (rendering the device inoperable or bricked). Because Trusted Firmware is the root of trust, the attacker's position undermines all downstream security guarantees, including OS integrity, trusted application isolation, and hardware-backed key storage.

No public indicators of compromise or threat actor campaigns have been linked to this CVE. Exploitation is likely to remain targeted and low-volume due to the local access prerequisite.

Impact Assessment

The business impact of CVE-2026-13465 is severe for organizations deploying Altera SoC FPGA platforms with vulnerable Trusted Firmware. The CVSS base score of 8.1 reflects high integrity and availability impact with scope change, meaning exploitation crosses security boundaries and undermines the platform's foundational trust model.

Affected systems include any device where Altera Trusted Firmware on HPS is running versions at or below socfpga_v2.14.0. This encompasses industrial control systems, aerospace and defense platforms, automotive systems, networking and telecommunications equipment, and embedded devices leveraging Altera SoC FPGAs (e.g., Arria, Cyclone, Stratix families with integrated HPS). The blast radius is determined by deployment context: a compromised trusted firmware on a networking device can enable persistent network-level attacks; on an industrial controller, it can subvert safety and process integrity; on a defense platform, it can compromise classified processing.

The scope change (S:C) is particularly concerning because it means the vulnerability in Trusted Firmware impacts components with different security privileges — effectively allowing a high-privilege local attacker to escalate into the most privileged execution environment on the chip. This can invalidate secure boot chains, expose hardware root keys, and enable firmware implants that survive conventional incident response (OS reimaging, disk replacement). Recovery may require hardware replacement or proprietary vendor re-flashing tools, driving up remediation costs and operational downtime.

Confidentiality impact is rated low (C:L), suggesting the attack is not primarily oriented toward data exfiltration, though the privileged access gained could still be leveraged to read sensitive memory. The dominant risks are integrity and availability: an attacker can modify trusted behavior and crash critical systems.

Organizations with regulatory obligations (e.g., IEC 62443 in industrial environments, ISO 21434 in automotive, or DoD requirements) face compliance exposure if vulnerable firmware is discovered in certified products.

Detection Guidance

Sigma Rule

title: Potential Trusted Firmware Memory Corruption Attempt (CVE-2026-13465)
id: 8f3a2e1c-4b7d-4e9a-9c1f-2d6e8a0b5c3f
status: experimental
description: Detects anomalous interactions with Altera Trusted Firmware on HPS that may indicate attempts to trigger a stack-based buffer overflow (CVE-2026-13465).
references:
  - https://nvd.nist.gov/vuln/detail/CVE-2026-13465
author: Valters IT Threat Intelligence
date: 2026/01/01
tags:
  - attack.privilege_escalation
  - attack.t1068
  - cve.2026.13465
logsource:
  product: linux
  service: kernel
detection:
  selection_firmware:
    Image|contains:
      - 'trusted-firmware'
      - 'socfpga'
      - 'atf'
  selection_anomaly:
    Message|contains:
      - 'stack'
      - 'overflow'
      - 'secure world'
      - 'smc'
  condition: selection_firmware and selection_anomaly
falsepositives:
  - Legitimate firmware update operations
  - Debugging sessions by authorized engineers
level: high

YARA Rule

rule CVE_2026_13465_Altera_TrustedFirmware_BufferOverflow
{
    meta:
        description = "Detects Altera Trusted Firmware socfpga builds potentially vulnerable to CVE-2026-13465 stack-based buffer overflow"
        author = "Valters IT Threat Intelligence"
        date = "2026-01-01"
        reference = "https://nvd.nist.gov/vuln/detail/CVE-2026-13465"
        severity = "high"

    strings:
        $fw_id = "socfpga" ascii wide nocase
        $tf_id = "Trusted Firmware" ascii wide nocase
        $ver_old = "v2.14" ascii wide
        $ver_old2 = "v2.13" ascii wide
        $ver_old3 = "v2.12" ascii wide
        $err1 = "stack" ascii wide nocase
        $err2 = "buffer overflow" ascii wide nocase
        $hps = "HPS" ascii wide

    condition:
        (uint32(0) == 0x464C457F) and
        ($fw_id or $tf_id) and
        ($ver_old or $ver_old2 or $ver_old3) and
        ($hps) and
        filesize < 20MB
}

Suricata IDS Rule

alert ip any any -> any any (msg:"CVE-2026-13465 Altera Trusted Firmware HPS Stack Buffer Overflow Exploitation Attempt"; flow:to_server; content:"|00 00|"; depth:2; byte_test:4,>,4096,0,relative; metadata:cve CVE-2026-13465, attack_target Server, deployment Perimeter, signature_severity Major; reference:url,nvd.nist.gov/vuln/detail/CVE-2026-13465; classtype:attempted-admin; sid:202613465; rev:1;)

Elastic Detection

process where process.name in ("trusted-firmware", "atf", "bl31") and
  process.args : ("*overflow*", "*corrupt*", "*smc*") and
  event.outcome == "failure"

Splunk SPL Query

index=* (sourcetype=syslog OR sourcetype=linux_secure OR sourcetype=kernel)
("trusted firmware" OR "socfpga" OR "atf" OR "bl31" OR "secure monitor")
("overflow" OR "stack" OR "corrupt" OR "smc")
| stats count min(_time) as firstTime max(_time) as lastTime by host, process, message
| where count > 0
| convert ctime(firstTime) ctime(lastTime)

Wazuh OSSEC Rule

<group name="altera_trusted_firmware,cve_2026_13465,">
  <rule id="100465" level="12">
    <decoded_as>syslog</decoded_as>
    <match>trusted-firmware|socfpga|bl31</match>
    <regex>overflow|stack|corrupt|smc</regex>
    <description>CVE-2026-13465: Potential Altera Trusted Firmware HPS stack buffer overflow exploitation attempt detected</description>
    <mitre>
      <id>T1068</id>
    </mitre>
    <group>privilege_escalation,pci_dss_10.2.5,</group>
  </rule>
</group>

Mitigation & Patch Guidance

Patch confidence: 0/4 (UNPATCHED — no patch evidence from any tracked source).

1) Immediate Mitigations

  • Restrict local access to the HPS and any interfaces capable of reaching Trusted Firmware (SMC interfaces, shared memory regions, debug ports). Disable JTAG and other debug interfaces in production.
  • Enforce least privilege on the Application Processor; prevent untrusted code from reaching privileged execution (kernel modules, secure-world drivers) that could forward crafted input to Trusted Firmware.
  • Monitor firmware integrity at boot using TPM- or hardware-based attestation where available, so any modification to Trusted Firmware is detected even if the vulnerability cannot be prevented.
  • Apply network segmentation and physical security controls to limit an attacker's ability to gain the local high-privilege foothold required (PR:H) to trigger the overflow.
  • Track vendor advisories from Altera/Intel PSG for an updated Trusted Firmware release beyond socfpga_v2.14.0.

2) Patch / Upgrade Steps

  • No vendor patch is currently available. When Altera/Intel PSG publishes a Trusted Firmware release that addresses CVE-2026-13465, upgrade the firmware on all affected HPS-based SoC FPGA devices to that version or later (beyond socfpga_v2.14.0).
  • Follow the vendor's secure firmware update procedure to preserve boot-chain integrity. Verify firmware signatures after update.
  • Re-validate secure boot keys and consider key rotation if compromise of the trusted environment is suspected.

3) Long-Term Hardening

  • Enable and enforce all available memory-protection hardening in Trusted Firmware builds: stack canaries, non-executable stack, read-only relocation, and guard regions. Ensure build flags and configuration options actually enable these protections (the root cause here includes "improperly configured or implemented memory protections").
  • Adopt a hardware root-of-trust with measured boot and remote attestation so that compromised or modified Trusted Firmware is detectable.
  • Incorporate firmware SBOM and version tracking into asset management, so affected socfpga_v2.14.0 and earlier builds can be identified and prioritized for upgrade.
  • Conduct code review and fuzz testing of Trusted Firmware input paths to catch bounds-checking defects before deployment.
  • Establish a vulnerability management process that monitors embedded/firmware CVEs, which often fall outside conventional OS patch cycles.

References

No public proof-of-concept, exploit code, or threat-actor campaign has been identified for CVE-2026-13465 at the time of writing. No evidence of exploitation in the wild is available. This assessment should be revisited if Altera/Intel PSG publishes a patch or if exploit activity emerges.

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product:"Altera"
title:"Altera"
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